The present invention is directed to transistor apparatuses, and especially to transistor apparatuses configured using silicon on insulator (SOI) technology.
SOI transistors, by way of example and not by way of limitation, may be electrically isolated with respect to adjacent transistor apparatuses and with respect to other circuit components in a device or product by a barrier structure. The barrier structure may be embodied in an oxide-filled (or another electrically isolating agent in place of an oxide) trench substantially surrounding a transistor apparatus. A bottom oxide (BOX) layer may cooperate with the trench to isolate the transistor at its bottom, and a top or cap of oxide may be employed cooperate with the trench to effect electrical isolation at the top of the transistor. Electrical access may be provided through the top or cap in order to establish required electrical connections with the transistor.
A problem with such an electrically isolated transistor is that the transistor apparatus may also be thermally isolated. Such thermal isolation can result in thermally induced offsets that are undesirable and may unpredictably affect operation of the isolated transistor.
There is a need for an electrically isolated transistor apparatus that is constructed to reduce thermal isolation of the apparatus as compared with prior art such transistor apparatuses.
There is also a need for an electrically isolated SOI transistor apparatus that is constructed to reduce thermal isolation of the apparatus as compared with prior art such transistor apparatuses.